(a) Field of the Invention
The present invention relates to a plasma display device and a plasma display panel (PDP) driving method.
(b) Description of the Related Art
A PDP is a flat display that uses plasma generated via a gas discharge process to display characters or images. Depending on its size, the PDP can include tens to millions of pixels that are provided thereon in a matrix format. According to the supplied driving voltage waveforms and discharge cell structures, PDPs can be categorized into direct current (DC) PDPs and alternating current (AC) PDPs.
Since the DC PDPs have electrodes exposed in the discharge space, they allow a current to flow in the discharge space while the voltage is supplied, and therefore they are problematic in that they require resistors for current restriction. On the other hand, since the AC PDPs have electrodes covered by a dielectric layer, capacitances are naturally formed to restrict the current, and the electrodes are protected from ion shocks in the case of discharging. Accordingly, the AC PDPs have a longer lifespan than the DC PDPs.
FIG. 1 shows a perspective view of an AC PDP.
As shown in FIG. 1, scan electrodes 4 and sustain electrodes 5 are disposed over a dielectric layer 2 and a protection film 3. The scan electrodes 4 and the sustain electrodes 5 in pairs are formed in parallel and are under a first glass substrate 1. A plurality of address electrodes 8 covered with an insulation layer 7 are installed on a second glass substrate 6. Barrier ribs 9 are formed on the insulation layer 7, between the address electrodes 8, and in parallel with the address electrodes 8. Phosphors 10 are formed on the surface of the insulation layer 7 and between the barrier ribs 9. The first and second glass substrates 1 and 6 are provided facing each other with discharge spaces between them 1 and 6 so that the scan electrodes 4 and the sustain electrodes 5 can cross the address electrodes 8. A discharge space 11 between an address electrode of the address electrodes 8 and a crossing part of a pair of the scan electrodes 4 and the sustain electrodes 5 form a discharge cell 12, which is schematically indicated.
FIG. 2 shows a PDP electrode arrangement diagram.
As shown in FIG. 2, the PDP electrodes have an m×n matrix configuration. Address electrodes A1 to Am are arranged in a column direction, and scan electrodes Y1 to Yn and sustain electrodes X1 to Xn are alternately arranged in a row direction. The discharge cell 12 shown in FIG. 2 substantially corresponds to the discharge cell 12 shown in FIG. 1.
In general, a frame is divided into a plurality of subfields with respective weights and is driven in an AC PDP. For example, 256 gray scales can be represented through combination of eight subfields with the weights of 1, 2, 4, 8, 16, 32, 64, and 128. In this instance, each subfield includes a reset period, an address period, a sustain period, and an erase period in a temporal operation variation manner.
In the reset period, the states of the respective cells are reset in order to smoothly address the cells. In the addressing period, the cells that are turned on and the cells that are not turned on in a panel are selected, and wall charges are accumulated to the cells that are turned on (i.e., the addressed cells). In the sustain period, discharge is performed in order to actually display pictures on the addressed cells.
Recently, because of high efficiency of the PDPs, a magnitude of a quantity of light displayed by a discharge, i.e. brightness, has increased. In the case of displaying the gray scale of 0, a low quantity of light generated in the reset period is provided. In the case of displaying the gray scale of 1, a quantity of light generated in the address period and a quantity of light generated by sustain discharge pulses in the sustain period are provided in addition to the quantity of light generated in the reset period. Since the difference of brightness between the gray scales of 0 and 1 (i.e., a minimum unit of difference in brightness) is increased because of summation of the quantities of light in the address period and the sustain period, performance of low gray representation (e.g., representation having lower brightness) is restricted and/or degraded.